Product Summary

The K4S281632F-UC75 is designed as 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits, fabricated with SAMSUNGs high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the K4S281632F-UC75 to be useful for a variety of high bandwidth, high performance memory system applications.

Parametrics

K4S281632F-UC75 absolute maximum ratings: (1)voltage on any pin relative to Vss: -1.0V to 4.6V; (2)voltage on Vdd supply relative to Vss: -1.0V to 4.6V; (3)storage temperature: -55℃ to +150℃; (4)power dissipation: 1W; (5)short circuit current: 50mA.

Features

K4S281632F-UC75 features: (1) JEDEC standard 3.3V power supply; (2) LVTTL compatible with multiplexed address; (3) Four banks operation; (4) MRS cycle with address key programs which means CAS latency (2 & 3), burst length (1, 2, 4, 8 & full page) and burst type (sequential & interleave); (5) All inputs are sampled at the positive going edge of the system clock; (6) Burst read single-bit write operation; (7) DQM (x4,x8) & L(U)DQM (x16) for masking; (8) Auto & self refresh; (9) 64ms refresh period (4K cycle); (10) 54 TSOP(II) Pb-free package. (11) RoHS compliant.

Diagrams

K4S281632F-UC75 circuit diagram

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K4S281632F-UC75
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K4S280432A
K4S280432A

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K4S280432B
K4S280432B

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K4S280432C
K4S280432C

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K4S280432E-TC(L)75
K4S280432E-TC(L)75

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K4S280432F
K4S280432F

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K4S280432F-TC(L)75
K4S280432F-TC(L)75

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